All the Defacto Team is wishing you a great and prosperous year 2022!
Every year the maturity of this solution is increased, and also new capabilities are added to SoC Compiler. Typical examples of new capabilities and technologies that have been added recently are:
- System level design extraction, including system level reporting for memory maps, and registers
- Power integration in terms of promotion, demotion of the UPF (Not only the RTL is managed at the front-end during the assembly of the IPs, but also the promotion of the Power Intent files)
- Design learning at RTL including extracting complex clock trees automatically from the RTL
- DFT and in particular automatic test point insertion before entering the DFT implementation flow (exploration of the test points in terms of cost, quality and others).
